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LoopUtils.h File Reference
#include "mlir/IR/Block.h"
#include "mlir/Support/LLVM.h"
#include "mlir/Support/LogicalResult.h"
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Classes

struct  mlir::AffineCopyOptions
 Explicit copy / DMA generation options for mlir::affineDataCopyGenerate. More...
 

Namespaces

 mlir
 
 mlir::loop
 

Typedefs

using mlir::Loops = SmallVector< loop::ForOp, 8 >
 
using mlir::TileLoops = std::pair< Loops, Loops >
 

Functions

LogicalResult mlir::loopUnrollFull (AffineForOp forOp)
 Unrolls this loop completely. More...
 
LogicalResult mlir::loopUnrollByFactor (AffineForOp forOp, uint64_t unrollFactor)
 
LogicalResult mlir::loopUnrollUpToFactor (AffineForOp forOp, uint64_t unrollFactor)
 
void mlir::getPerfectlyNestedLoops (SmallVectorImpl< AffineForOp > &nestedLoops, AffineForOp root)
 
void mlir::getPerfectlyNestedLoops (SmallVectorImpl< loop::ForOp > &nestedLoops, loop::ForOp root)
 
LogicalResult mlir::loopUnrollJamByFactor (AffineForOp forOp, uint64_t unrollJamFactor)
 Unrolls and jams this loop by the specified factor. More...
 
LogicalResult mlir::loopUnrollJamUpToFactor (AffineForOp forOp, uint64_t unrollJamFactor)
 
LogicalResult mlir::promoteIfSingleIteration (AffineForOp forOp)
 
void mlir::promoteSingleIterationLoops (FuncOp f)
 
void mlir::getCleanupLoopLowerBound (AffineForOp forOp, unsigned unrollFactor, AffineMap *map, SmallVectorImpl< Value > *operands, OpBuilder &builder)
 
LLVM_NODISCARD LogicalResult mlir::instBodySkew (AffineForOp forOp, ArrayRef< uint64_t > shifts, bool unrollPrologueEpilogue=false)
 
LLVM_NODISCARD LogicalResult mlir::tileCodeGen (MutableArrayRef< AffineForOp > band, ArrayRef< unsigned > tileSizes)
 
void mlir::interchangeLoops (AffineForOp forOpA, AffineForOp forOpB)
 
bool mlir::isValidLoopInterchangePermutation (ArrayRef< AffineForOp > loops, ArrayRef< unsigned > loopPermMap)
 
unsigned mlir::interchangeLoops (ArrayRef< AffineForOp > loops, ArrayRef< unsigned > loopPermMap)
 
AffineForOp mlir::sinkSequentialLoops (AffineForOp forOp)
 
void mlir::sinkLoop (AffineForOp forOp, unsigned loopDepth)
 
SmallVector< SmallVector< AffineForOp, 8 >, 8 > mlir::tile (ArrayRef< AffineForOp > forOps, ArrayRef< uint64_t > sizes, ArrayRef< AffineForOp > targets)
 
SmallVector< Loops, 8 > mlir::tile (ArrayRef< loop::ForOp > forOps, ArrayRef< Value > sizes, ArrayRef< loop::ForOp > targets)
 
SmallVector< AffineForOp, 8 > mlir::tile (ArrayRef< AffineForOp > forOps, ArrayRef< uint64_t > sizes, AffineForOp target)
 
Loops mlir::tile (ArrayRef< loop::ForOp > forOps, ArrayRef< Value > sizes, loop::ForOp target)
 
Loops mlir::tilePerfectlyNested (loop::ForOp rootForOp, ArrayRef< Value > sizes)
 
uint64_t mlir::affineDataCopyGenerate (Block::iterator begin, Block::iterator end, const AffineCopyOptions &copyOptions, DenseSet< Operation *> &copyNests)
 
TileLoops mlir::extractFixedOuterLoops (loop::ForOp rootFOrOp, ArrayRef< int64_t > sizes)
 
void mlir::coalesceLoops (MutableArrayRef< loop::ForOp > loops)
 
void mlir::mapLoopToProcessorIds (loop::ForOp forOp, ArrayRef< Value > processorId, ArrayRef< Value > numProcessors)